Management of Partially Safe Buffers
IEEE Transactions on Computers
A comparison of file system workloads
ATEC '00 Proceedings of the annual conference on USENIX Annual Technical Conference
Write-aware buffer cache management scheme for nonvolatile RAM
ACST'07 Proceedings of the third conference on IASTED International Conference: Advances in Computer Science and Technology
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Recently, byte-accessible NVRAM (nonvolatile RAM) technologies such as PRAM and FeRAM are advancing rapidly and there are attempts to use these NVRAMs as part of buffer caches. A nonvolatile buffer cache provides improved consistency of file systems by absorbing write I/Os as well as improved performance. In this paper, we discuss the optimality of cache replacement algorithms in nonvolatile buffer caches and present a new algorithm called NBM (NVRAM-aware Buffer cache Management). NBM has three salient features. First, it separately exploits read and write histories of block references, and thus it estimates future references of each operation more precisely. Second, NBM guarantees the complete consistency of write I/Os since all dirty data are cached in NVRAM. Third, metadata lists are maintained separately from cached blocks. This allows more efficient management of volatile and nonvolatile buffer caches based on read and write histories, respectively. Trace-driven simulations show that NBM improves the I/O performance of file systems significantly compared to the NVLRU algorithm that is a modified version of LRU to hold dirty blocks in NVRAM.