NePalTM: design and implementation of nested parallelism for transactional memory systems

Authors:
Haris Volos;Adam Welc;Ali-Reza Adl-Tabatabai;Tatiana Shpeisman;Xinmin Tian;Ravi Narayanaswamy
Affiliations:
University of Wisconsin, Madison, WI, USA;Intel Corporation, Santa Clara, CA, USA;Intel Corporation, Santa Clara, CA, USA;Intel Corporation, Santa Clara, CA, USA;Intel Corporation, Santa Clara, CA, USA;Intel Corporation, Santa Clara, CA, USA
Venue:
Proceedings of the 14th ACM SIGPLAN symposium on Principles and practice of parallel programming
Year:
2009

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Abstract

We present the programming model, design and implementation of NePalTM; a transactional memory system where atomic blocks can be used for concurrency control at an arbitrary level of nested parallelism.