Genetic Vector Quantizer Design on Reconfigurable Hardware

  • Authors:
  • Ting-Kuan Lin;Hui-Ya Li;Wen-Jyi Hwang;Chien-Min Ou;Sheng-Kai Weng

  • Affiliations:
  • Department of Computer Science and Information Engineering, National Taiwan Normal University, Taipei, Taiwan 117;Department of Computer Science and Information Engineering, National Taiwan Normal University, Taipei, Taiwan 117;Department of Computer Science and Information Engineering, National Taiwan Normal University, Taipei, Taiwan 117;Department of Electronics Engineering, Ching-Yun University, Chungli, Taiwan 320;Department of Computer Science and Information Engineering, National Taiwan Normal University, Taipei, Taiwan 117

  • Venue:
  • SEAL '08 Proceedings of the 7th International Conference on Simulated Evolution and Learning
  • Year:
  • 2008

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Abstract

This paper presents a novel hardware architecture for genetic vector quantizer (VQ) design. The architecture is based on steady-state genetic algorithm (GA). It adopts a novel architecture based on shift registers for accelerating mutation and crossover operations while reducing area cost. It also uses a pipeline architecture for fitness evaluation. The proposed architecture has been embedded in a softcore CPU for physical performance measurement. Experimental results show that the proposed architecture is an effective alternative for VQ optimization attaining both high performance and low computational time.