H.264/AVC Video Encoder Realization and Acceleration on TI DM642 DSP

Authors:
Daw-Tung Lin;Chung-Yu Yang
Affiliations:
Department of Computer Science and Information Engineering, National Taipei University, Taipei, Taiwan 237;Department of Computer Science and Information Engineering, National Taipei University, Taipei, Taiwan 237
Venue:
PSIVT '09 Proceedings of the 3rd Pacific Rim Symposium on Advances in Image and Video Technology
Year:
2009

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Abstract

This work develops and optimizes H.264/AVC video encoder on the TM320DM642 DSP platform. In order to transplant x264 source program onto the DSP and to accelerate the coding speed, a series of optimization methods have been proposed in this paper, including 2-D fast mode decision, sub-pixel optimization for motion estimation, and weighted matrix quantization. Furthermore, based on the architectural features of TM320DM642, various system level optimization techniques have been utilized. This paper focuses on the reduction of algorithm complexity. Experimental results reveal that the optimized H.264 video encoder retains satisfactory quality with very low degradation. The implemented codec can achieve the coding speed of 22.6fps and more than 40fps for VGA (640×480) and CIF (352×288) resolution, respectively. The proposed H.264 codec can be employed in many real-time applications.