An Efficient Software-Managed Cache Based on Cell Broadband Engine Architecture

  • Authors:
  • Feng Guofu;Dong Xiaoshe;Wang Xuhao;Chu Ying;Zhang Xingjun

  • Affiliations:
  • Dept. of Computer Science and Technology, Xi'an Jiaotong University, Xi'an, China;Dept. of Computer Science and Technology, Xi'an Jiaotong University, Xi'an, China;Dept. of Computer Science and Technology, Xi'an Jiaotong University, Xi'an, China;Dept. of Computer Science and Technology, Xi'an Jiaotong University, Xi'an, China;Dept. of Computer Science and Technology, Xi'an Jiaotong University, Xi'an, China

  • Venue:
  • International Journal of Distributed Sensor Networks
  • Year:
  • 2009

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Abstract

While the CBEA (Cell Broadband Engine Architecture) offers substantial computational power, its explicit multilevel memory hierarchy poses significant challenges to traditional programming, especially in performance and programmability. Software-managed cache is a technique that attempts to address such issues. But there still remain some limitations in current software-managed cache technologies. First, a complex managing logic of the full implementation of the software-managed cache which is not suitable for SPU designed as a vector computational unit influences computation significantly. Second, the external managing code of the software-managed cache causes the amount of computing code explosion. Besides increasing the computing burden of the accelerator, the external code occupies precious room of local storage which is shared by computing code and data. Finally, its inconvenient user interface presents significant obstacles for it to be widely applied. Based on the locality of memory access, this paper proposes an efficient software-managed cache named ECellS cache. In the paper, several customized library interfaces were designed respectively to simplify the cache implementation and reduce cache code size. On the other hand, the code segment of the application which accesses data residing in main memory frequently is defined as a cache section. Several of these types of cache sections could be combined into a “cache bind” and be managed in parallel by using SIMD technology. By this type of coarse-grain managing method and additional simplifying the construction of software cache, ECellS cache reduces both the burden of SPU to manage the cache buffer and the size of the cache managing code. Finally, based on local address remapping technology, a more convenient programming interface which is similar to OpenMP directive is presented to facilitate programming. By this technology, requesting for data residing in the main memory will be automatically mapped to cache buffer in local storage of SPE, and there needs to be no extra modifying for the computing source code inside the cache section except for inserting the directive outside of it. Experimental results of this paper based on the Cell processor demonstrate that our proposed software-managed cache improves performance by 15-35% over the CBE SDK software-managed cache in most test cases. With ECellS cache it could be more convenient for the user to develop and port applications based on CBE architecture.