Efficient algorithms for extracting the K most critical paths in timing analysis
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
A general probabilistic framework for worst case timing analysis
Proceedings of the 39th annual Design Automation Conference
Design of High-Performance Microprocessor Circuits
Design of High-Performance Microprocessor Circuits
Computation and Refinement of Statistical Bounds on Circuit Delay
Proceedings of the 40th annual Design Automation Conference
Design for Variability in DSM Technologies
ISQED '00 Proceedings of the 1st International Symposium on Quality of Electronic Design
First-order incremental block-based statistical timing analysis
Proceedings of the 41st annual Design Automation Conference
Fast statistical timing analysis handling arbitrary delay correlations
Proceedings of the 41st annual Design Automation Conference
Statistical Timing Analysis Considering Spatial Correlations using a Single Pert-Like Traversal
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Modeling Within-Die Spatial Correlation Effects for Process-Design Co-Optimization
ISQED '05 Proceedings of the 6th International Symposium on Quality of Electronic Design
Monte Carlo Statistical Methods (Springer Texts in Statistics)
Monte Carlo Statistical Methods (Springer Texts in Statistics)
Correlation-aware statistical timing analysis with non-gaussian delay distributions
Proceedings of the 42nd annual Design Automation Conference
Correlation-preserved non-gaussian statistical timing analysis with quadratic timing model
Proceedings of the 42nd annual Design Automation Conference
A general framework for accurate statistical timing analysis considering correlations
Proceedings of the 42nd annual Design Automation Conference
Statistical delay computation considering spatial correlations
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
Statistical timing analysis with two-sided constraints
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
An Introduction to Copulas (Springer Series in Statistics)
An Introduction to Copulas (Springer Series in Statistics)
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Statistical static timing analysis (SSTA) has emerged as a viable technique to capture increasing process variations in 90nm technologies and beyond. To obtain realistic results from a statistical timer, careful attention to the statistical gate delays and correlations between them is required. However when using SSTA early in the design phase, no correlation information is available. This paper addresses this problem and proposes a novel path-based algorithm, which covers arbitrary correlations by computing bounds for the true path delay distribution. Our bounding method is based on the theory of copulas as well as an efficient bounding improvement technique. The efficiency and accuracy of the proposed algorithm is demonstrated on ISCAS'85 benchmark circuits. Over all testcases and all spatial correlation structures the average error of the 95 th quantile points is smaller than 7% and the run-time is drastically reduced compared to a transistor level SPICE Monte Carlo simulation.