Parallelizing fundamental algorithms such as sorting on multi-core processors for EDA acceleration

Authors:
Masato Edahiro
Affiliations:
University of Tokyo, Tokyo, Japan
Venue:
Proceedings of the 2009 Asia and South Pacific Design Automation Conference
Year:
2009

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Abstract

Fundamental algorithms should be parallelized to accelerate EDA software on multi-core architecture. In this paper, we introduce scalable algorithms that have scalability on multi-cores. As an example, a sorting algorithm, called Map Sort, is presented. This algorithm uses a map from subsets of input data to intervals on data range. Experimental results show that, in comparison with quick sort on a single CPU, processing time of Map Sort is comparable on a CPU and three times faster on four CPUs.