OFDM for Wireless Multimedia Communications
OFDM for Wireless Multimedia Communications
12-23 GHz Ultra Wide Tuning Range Voltage-Controlled Ring Oscillator with Hybrid Control Schemes
ISVLSI '05 Proceedings of the IEEE Computer Society Annual Symposium on VLSI: New Frontiers in VLSI Design
Radio Frequency Integrated Circuit Design
Radio Frequency Integrated Circuit Design
| Hi-index | 0.00 |
In this paper, an integrated 2.2-5.7GHz multi-band differential LC VCO for multi-standard wireless communication systems was designed utilizing 0.35@mm SiGe BiCMOS technology. The topology, which combines the switching inductors and capacitors together in the same circuit, is a novel approach for wideband VCOs. Based on the post-layout simulation results, the VCO can be tuned using a DC voltage of 0 to 3.3V for 5 different frequency bands (2.27-2.51GHz, 2.48-2.78GHz, 3.22-3.53GHz, 3.48-3.91GHz and 4.528-5.7GHz) with a maximum bandwidth of 1.36GHz and a minimum bandwidth of 300MHz. The designed and simulated VCO can generate a differential output power between 0.992 and -6.087dBm with an average power consumption of 44.21mW including the buffers. The average second and third harmonics level were obtained as -37.21 and -47.6dBm, respectively. The phase noise between -110.45 and -122.5dBc/Hz, that was simulated at 1MHz offset, can be obtained through the frequency of interest. Additionally, the figure of merit (FOM), that includes all important parameters such as the phase noise, the power consumption and the ratio of the operating frequency to the offset frequency, is between -176.48 and -181.16 and comparable or better than the ones with the other current VCOs. The main advantage of this study in comparison with the other VCOs, is covering 5 frequency bands starting from 2.27 up to 5.76GHz without FOM and area abandonment. Output power of the fundamental frequency changes between -6.087 and 0.992dBm, depending on the bias conditions (operating bands). Based on the post-layout simulation results, the core VCO circuit draws a current between 2.4-6.3mA and between 11.4 and 15.3mA with the buffer circuit from 3.3V supply. The circuit occupies an area of 1.477mm^2 on Si substrate, including DC, digital and RF pads.