Preemptive priority-based scheduling: an appropriate engineering approach
Advances in real-time systems
Guaranteeing Real-Time Requirements With Resource-Based Calibration of Periodic Processes
IEEE Transactions on Software Engineering
RTAS '97 Proceedings of the 3rd IEEE Real-Time Technology and Applications Symposium (RTAS '97)
Task Scheduling with Feedback Latency for Real-Time Control Systems
RTCSA '98 Proceedings of the 5th International Conference on Real-Time Computing Systems and Applications
Scheduling Fixed-Priority Tasks with Preemption Threshold
RTCSA '99 Proceedings of the Sixth International Conference on Real-Time Computing Systems and Applications
On task schedulability in real-time control systems
RTSS '96 Proceedings of the 17th IEEE Real-Time Systems Symposium
Task Period Selection and Schedulability in Real-Time Systems
RTSS '98 Proceedings of the IEEE Real-Time Systems Symposium
ECRTS '07 Proceedings of the 19th Euromicro Conference on Real-Time Systems
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A real-time control system design procedure consists of the controller design stage and the implementation stage. In the controller design stage, various digital control theories are used with assumptions, such as synchronous sampling, no sampling jitter and negligible feedback latency (latency from sensing to actuation). However, in the implementation stage, multiple control tasks are usually scheduled on a processor, which creates a finite sampling period, varying feedback latency and sampling jitter, and therefore the controller's performance is degraded. In this article, we investigate the relationship between control performance and timing parameters. In the course of this investigation, we found that the feedback latency is the dominant factor affecting control performance. In addition, we propose a rate monotonic (RM) scheduler with non-preemptible last section algorithm, which can reduce the feedback latency considerably. The proposed algorithm provides better control performance than a preemptive RM scheduler, in most cases. The effectiveness of the proposed algorithm is shown in illustrative examples.