Programming model for a heterogeneous x86 platform

  • Authors:
  • Bratin Saha;Xiaocheng Zhou;Hu Chen;Ying Gao;Shoumeng Yan;Mohan Rajagopalan;Jesse Fang;Peinan Zhang;Ronny Ronen;Avi Mendelson

  • Affiliations:
  • Intel Corporation, Santa Clara, USA;Intel Corporation, Beijing, China;Intel Corporation, Beijing, China;Intel Corporation, Beijing, China;Intel Corporation, Beijing, China;Intel Corporation, Santa Clara, USA;Intel Corporation, Santa Clara, USA;Intel Corporation, Santa Clara, USA;Intel Corporation, Haifa, Israel;Microsoft Corporation, Haifa, Israel

  • Venue:
  • Proceedings of the 2009 ACM SIGPLAN conference on Programming language design and implementation
  • Year:
  • 2009

Quantified Score

Hi-index 0.00

Visualization

Abstract

The client computing platform is moving towards a heterogeneous architecture consisting of a combination of cores focused on scalar performance, and a set of throughput-oriented cores. The throughput oriented cores (e.g. a GPU) may be connected over both coherent and non-coherent interconnects, and have different ISAs. This paper describes a programming model for such heterogeneous platforms. We discuss the language constructs, runtime implementation, and the memory model for such a programming environment. We implemented this programming environment in a x86 heterogeneous platform simulator. We ported a number of workloads to our programming environment, and present the performance of our programming environment on these workloads.