CHES '08 Proceeding sof the 10th international workshop on Cryptographic Hardware and Embedded Systems
A timing attack against patterson algorithm in the McEliece PKC
ICISC'09 Proceedings of the 12th international conference on Information security and cryptology
A novel cryptoprocessor architecture for chained Merkle signature scheme
Microprocessors & Microsystems
An FPGA accelerator for hash tree generation in the merkle signature scheme
ARC'10 Proceedings of the 6th international conference on Reconfigurable Computing: architectures, Tools and Applications
Efficient implementations of MQPKS on constrained devices
CHES'12 Proceedings of the 14th international conference on Cryptographic Hardware and Embedded Systems
Practical lattice-based cryptography: a signature scheme for embedded systems
CHES'12 Proceedings of the 14th international conference on Cryptographic Hardware and Embedded Systems
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This paper presents a time-area efficient hardware architecture for the multivariate signature scheme Rainbow. As a part of this architecture, a high-performance hardware optimized variant of the well-known Gaussian elimination over GF(2l) and its efficient implementation are presented. The resulting signature generation core of Rainbow requires 63,593 gate equivalents and signs a message in just 804 clock cycles at 67 MHz using AMI 0.35μm CMOS technology. Thus, Rainbow provides significant performance improvements compared to RSA and ECDSA.