Theoretical Computer Science
Information Processing Letters
Characterization of the expressive power of silent transitions in timed automata
Fundamenta Informaticae
Reversal-Bounded Multicounter Machines and Their Decision Problems
Journal of the ACM (JACM)
From timed Petri nets to timed LOTOS
Proceedings of the IFIP WG6.1 Tenth International Symposium on Protocol Specification, Testing and Verification X
How to Compose Presburger-Accelerations: Applications to Broadcast Protocols
FST TCS '02 Proceedings of the 22nd Conference Kanpur on Foundations of Software Technology and Theoretical Computer Science
Symbolic Techniques for Parametric Reasoning about Counter and Clock Systems
CAV '00 Proceedings of the 12th International Conference on Computer Aided Verification
Binary Reachability Analysis of Discrete Pushdown Timed Automata
CAV '00 Proceedings of the 12th International Conference on Computer Aided Verification
Real-Time System Verification using P/T Nets
CAV '94 Proceedings of the 6th International Conference on Computer Aided Verification
Multiple Counters Automata, Safety Analysis and Presburger Arithmetic
CAV '98 Proceedings of the 10th International Conference on Computer Aided Verification
Decidability of reachability in vector addition systems (Preliminary Version)
STOC '82 Proceedings of the fourteenth annual ACM symposium on Theory of computing
A study of the recoverability of computing systems.
A study of the recoverability of computing systems.
Computation: finite and infinite machines
Computation: finite and infinite machines
FAST: acceleration from theory to practice
International Journal on Software Tools for Technology Transfer (STTT)
About Fast and TReX Accelerations
Electronic Notes in Theoretical Computer Science (ENTCS)
Journal of Computer and System Sciences
Flat acceleration in symbolic model checking
ATVA'05 Proceedings of the Third international conference on Automated Technology for Verification and Analysis
ATVA'10 Proceedings of the 8th international conference on Automated technology for verification and analysis
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We introduce Timed Counter Systems, a new class of systems mixing clocks and counters. Such systems have an infinite state space, and their reachability problems are generally undecidable. By abstracting clock values with a Region Graph, we show the Counter Reachability Problem to be decidable for three subclasses: Timed VASS, Bounded Timed Counter Systems, and Reversal-Bounded Timed Counter Systems.