Extending Automatic Parallelization to Optimize High-Level Abstractions for Multicore

  • Authors:
  • Chunhua Liao;Daniel J. Quinlan;Jeremiah J. Willcock;Thomas Panas

  • Affiliations:
  • Center for Applied Scientific Computing, Lawrence Livermore National Laboratory, Livermore, CA 94551;Center for Applied Scientific Computing, Lawrence Livermore National Laboratory, Livermore, CA 94551;Computer Science Department, Indiana University, Bloomington, 47404;Center for Applied Scientific Computing, Lawrence Livermore National Laboratory, Livermore, CA 94551

  • Venue:
  • IWOMP '09 Proceedings of the 5th International Workshop on OpenMP: Evolving OpenMP in an Age of Extreme Parallelism
  • Year:
  • 2009

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Abstract

Automatic introduction of OpenMP for sequential applications has attracted significant attention recently because of the proliferation of multicore processors and the simplicity of using OpenMP to express parallelism for shared-memory systems. However, most previous research has only focused on C and Fortran applications operating on primitive data types. C++ applications using high-level abstractions, such as STL containers and complex user-defined types, are largely ignored due to the lack of research compilers that are readily able to recognize high-level object-oriented abstractions and leverage their associated semantics. In this paper, we automatically parallelize C++ applications using ROSE, a multiple-language source-to-source compiler infrastructure which preserves the high-level abstractions and allows us to unambiguously leverage their known semantics. Several representative parallelization candidate kernels are used to explore semantic-aware parallelization strategies for high-level abstractions, combined with extended compiler analyses. Those kernels include an array-based computation loop, a loop with task-level parallelism, and a domain-specific tree traversal. Our work extends the applicability of automatic parallelization to modern applications using high-level abstractions and exposes more opportunities to take advantage of multicore processors.