A massively parallel architecture for a self-organizing neural pattern recognition machine
Computer Vision, Graphics, and Image Processing
Analysis and synthesis of MOS translinear circuits
Analysis and synthesis of MOS translinear circuits
An ART1 microchip and its use in multi-ART1 systems
IEEE Transactions on Neural Networks
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In this paper, a mixed-signal current-mode chip is implemented using commercial 0.35-m technology. It performs the preprocessing task done by the first neurons layers in ART-based neural networks. Post layout simulations show an acceptable linearity error for such neural systems. The input signal swings from 20 to 50 μA. The circuit operates at a supply voltage of 3.3 V with 200 kHz bandwidth.