Proceedings of the 6th international workshop on Hardware/software codesign
A Micro-Genetic Algorithm for Multiobjective Optimization
EMO '01 Proceedings of the First International Conference on Evolutionary Multi-Criterion Optimization
Bandwidth-Constrained Mapping of Cores onto NoC Architectures
Proceedings of the conference on Design, automation and test in Europe - Volume 2
A Multi-Objective Evolutionary Algorithm Based Optimization Model for Network-on-Chip Synthesis
ITNG '07 Proceedings of the International Conference on Information Technology
A fast and elitist multiobjective genetic algorithm: NSGA-II
IEEE Transactions on Evolutionary Computation
Hi-index | 0.00 |
Network-on-chip (NoC) are considered the next generation of communication infrastructure for a multiprocessors system-on-chip (MPSoCs). In the platform-based methodology, an application is implemented by a set of collaborating intellectual properties (IPs) blocks. In this paper, we use NSGA-II and microGA to yield efficient topological pre-selected sets IPs on the tiles of a mesh-based NoC. Each IP is associated with a processor that best implements its functionality. The IP mapping optimization is driven by the area occupied, execution time and power consumption.