VLSI for 5000-word continuous speech recognition

Authors:
Young-kyu Choi;Kisun You;Jungwook Choi;Wonyong Sung
Affiliations:
LG Electronics, Korea;School of Electrical Engineering, Seoul National University, Korea;School of Electrical Engineering, Seoul National University, Korea;School of Electrical Engineering, Seoul National University, Korea
Venue:
ICASSP '09 Proceedings of the 2009 IEEE International Conference on Acoustics, Speech and Signal Processing
Year:
2009

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Cited 3

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IEEE Transactions on Circuits and Systems Part I: Regular Papers
Memory Access Optimized VLSI for 5000-Word Continuous Speech Recognition

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Flexible and Expandable Speech Recognition Hardware with Weighted Finite State Transducers

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Abstract

We have developed a VLSI chip for 5,000 word speaker-independent continuous speech recognition. This chip employs a context-dependent HMM (hidden Markov model) based speech recognition algorithm, and contains emission probability and Viterbi beam search pipelined hardware units. The feature vector for speech recognition is computed using a host processor in software in order to adopt various enhancement algorithms. The amount of internal SRAM size is minimized by moving data out to the external DRAM, and a custom DRAM controller module is designed to efficiently read and write consecutive data. The experimental result shows that the implemented system has a real-time factor of 0.77 and 0.55 using SDRAM and DDR SDRAM, respectively.