An experimental validation of system level design space exploration methodology for energy efficient sensor nodes

  • Authors:
  • Sonali Chouhan;M. Balakrishnan;Ranjan Bose

  • Affiliations:
  • Indian Institute of Technology Delhi, New Delhi, India;Indian Institute of Technology Delhi, New Delhi, India;Indian Institute of Technology Delhi, New Delhi, India

  • Venue:
  • Proceedings of the 14th ACM/IEEE international symposium on Low power electronics and design
  • Year:
  • 2009

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Abstract

For closely deployed sensor nodes, computation energy along with radio energy determines the battery life. We have proposed a system level design space exploration methodology [1] for searching an energy efficient error correcting code (ECC). This methodology takes into account the computation and the radio energy in an integrated manner. In this paper we validate this methodology by deploying Imote2 nodes and measuring energy values under different operating modes, e.g., with and without ECC. Experimental results validate the methodology and show that with ECC we can save upto 13% transmitter energy for certain set of conditions. This paper validates experimentally that our methodology is effective in exploration of various node configurations and finding an energy efficient solution.