The bifurcating neuron network 2: an analog associative memory
Neural Networks
Analysis of Composite Dynamics of Two Bifurcating Neurons
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
Artificial Spiking Neurons and Analog-to-Digital-to-Analog Conversion
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
A novel chaotic spiking neuron and its paralleled spike encoding function
IJCNN'09 Proceedings of the 2009 international joint conference on Neural Networks
A novel artificial model of spiral ganglion cell and its spike-based encoding function
ICONIP'08 Proceedings of the 15th international conference on Advances in neuro-information processing - Volume Part I
IEEE Transactions on Neural Networks
A novel hybrid spiking neuron: bifurcations, responses, and on-chip learning
IEEE Transactions on Circuits and Systems Part I: Regular Papers
Self-organizing digital spike interval maps
ICONIP'11 Proceedings of the 18th international conference on Neural Information Processing - Volume Part II
Bifurcating neurons with filtered base signals
ICANN'12 Proceedings of the 22nd international conference on Artificial Neural Networks and Machine Learning - Volume Part I
Basic analysis of digital spike maps
ICANN'12 Proceedings of the 22nd international conference on Artificial Neural Networks and Machine Learning - Volume Part I
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A novel chaotic spiking neuron is presented and its nonlinear dynamics and encoding functions are analyzed. A set of paralleled N neurons accepts a common analog input and outputs a set of N chaotic spike-trains. Three theorems which guarantee that the neurons can encode the analog input into a summation of the N chaotic spike-trains are derived: (1) a spike histogram of the summed spike-train can mimic waveforms of various inputs, (2) the spike-trains do not synchronize to each other and thus the summed spike-train can have N times higher encoding resolution than each single spike-train, and (3) firing rates of the neurons can be adjusted by internal parameters. The theorems are proven by using nonlinear iterative maps and are confirmed by numerical simulations as well. Electronic circuit implementation methods of the paralleled neurons are also presented and typical paralleled encoding functions are confirmed by both experimental measurements and SPICE simulations.