Single pass depth peeling via CUDA rasterizer

  • Authors:
  • Fang Liu;Meng-Cheng Huang;Xue-Hui Liu;En-Hua Wu

  • Affiliations:
  • Chinese Academy of Sciences;Chinese Academy of Sciences;Chinese Academy of Sciences;Chinese Academy of Sciences and University of Macau

  • Venue:
  • SIGGRAPH 2009: Talks
  • Year:
  • 2009

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Abstract

Multi-fragment effects play important roles on many graphics applications, which require operations on more than one fragment per pixel. The classical depth peeling algorithm [Everitt 2001] peels off one layer each pass, but the performance degrades for large scenes. We prefer to capture multiple fragments in a single pass, which is difficult because the fragments generated in graphics pipeline are not allowed to be scattered to arbitrary positions of the buffers. Compute unified device architecture (CUDA) [NVIDIA 2008] provides more flexible control over the GPU memory, but accessing of the fragments generated by graphics pipeline is not yet supported. In this work we design a CUDA rasterizer so that many graphics applications can benefit from the free control of GPU memory, especially for the multi-fragment effects. We present two efficient schemes to capture and sort multiple fragments per pixel in a single geometry pass via the atomic operations of CUDA without read-modify-write (RMW) hazards. Experimental results show significant speedup to classical depth peeling, especially for large scenes.