Floorplan representations: Complexity and connections
ACM Transactions on Design Automation of Electronic Systems (TODAES)
An extended representation of Q-sequence for optimizing channel-adjacency and routing-cost
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
Coding Floorplans with Fewer Bits
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
Optimal binary representation of mosaic floorplans and baxter permutations
FAW-AAIM'12 Proceedings of the 6th international Frontiers in Algorithmics, and Proceedings of the 8th international conference on Algorithmic Aspects in Information and Management
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A subdivision of a rectangle into rectangular faces with horizontal and vertical line segments is called a rectangular drawing or floorplan. Yamanaka and Nakano published a (5n - 5)-bit representation of a rectangular drawing, where n is the number of inner rectangles. In this paper, a (4n -4)-bit representation of rectangular drawing is introduced. Moreover, this representation gives an alternative proof that the number of rectangles with n rectangles R (n ) ≤ 13.5 n - 1.