Performance of multiple-bus multiprocssor under non-uniform memory reference model (abstract)

  • Authors:
  • M. A. Sayeed;M. Atiquzzaman

  • Affiliations:
  • -;-

  • Venue:
  • ISCA '92 Proceedings of the 19th annual international symposium on Computer architecture
  • Year:
  • 1992

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Abstract

Performance evaluation of multiple-bus multiprocessor systems is usually carried out under the assumption of uniform memory reference model. Hot spots arising in multiprocessor systems due to the use of shared variable, synchronization primitives etc., give rise to non-uniform memory reference patterns. The objective of this paper is to study the performance of multiple bus multiprocessor system in the presence of hot spots. Analytic expressions for the average memory bandwidth and probability of acceptance of prioritized processors have been derived. The results are validated by simulation results.