HPCA '95 Proceedings of the 1st IEEE Symposium on High-Performance Computer Architecture
| Hi-index | 0.00 |
In this paper we argue that a two-way second-level cache is a better design choice than a direct-mapped organization. We show two-way caches are as simple to implement as direct-mapped caches. If the cache controller contains tags, the data array can be organized as a single bank of standard SRAM. Otherwise, both tags and data can be organized as a single SRAM bank. Our simulation results show these novel two-way organizations outperform the direct-mapped approach.