Geometry of Synthesis II: From Games to Delay-Insensitive Circuits
Electronic Notes in Theoretical Computer Science (ENTCS)
On the compositionality of round abstraction
CONCUR'10 Proceedings of the 21st international conference on Concurrency theory
Concurrent logic games on partial orders
WoLLIC'11 Proceedings of the 18th international conference on Logic, language, information and computation
Geometry of synthesis iv: compiling affine recursion into static hardware
Proceedings of the 16th ACM SIGPLAN international conference on Functional programming
Program equivalence in a simple language with state
Computer Languages, Systems and Structures
Game Semantics in the Nominal Model
Electronic Notes in Theoretical Computer Science (ENTCS)
Abstract Machines for Game Semantics, Revisited
LICS '13 Proceedings of the 2013 28th Annual ACM/IEEE Symposium on Logic in Computer Science
Hi-index | 0.00 |
Model Checking is an automatic verification technique for state-transition systems that are finite-state or that have finite-state abstractions. In the early 1980's in a series of joint papers with my graduate students E.A. Emerson and A.P. Sistla, we ...