Paired ROBs: A Cost-Effective Reorder Buffer Sharing Strategy for SMT Processors

Authors:
R. Ubal;J. Sahuquillo;S. Petit;P. López
Affiliations:
Department of Computing Engineering (DISCA), Universidad Politécnica de Valencia, Valencia, Spain;Department of Computing Engineering (DISCA), Universidad Politécnica de Valencia, Valencia, Spain;Department of Computing Engineering (DISCA), Universidad Politécnica de Valencia, Valencia, Spain;Department of Computing Engineering (DISCA), Universidad Politécnica de Valencia, Valencia, Spain
Venue:
Euro-Par '09 Proceedings of the 15th International Euro-Par Conference on Parallel Processing
Year:
2009

Citing 12
Cited 0

Simultaneous multithreading: maximizing on-chip parallelism

ISCA '95 Proceedings of the 22nd annual international symposium on Computer architecture
Exploiting choice: instruction fetch and issue on an implementable simultaneous multithreading processor

ISCA '96 Proceedings of the 23rd annual international symposium on Computer architecture
The MIPS R10000 Superscalar Microprocessor

IEEE Micro
Front-End Policies for Improved Issue Efficiency in SMT Processors

HPCA '03 Proceedings of the 9th International Symposium on High-Performance Computer Architecture
The Impact of Resource Partitioning on SMT Processors

Proceedings of the 12th International Conference on Parallel Architectures and Compilation Techniques
Back-end assignment schemes for clustered multithreaded processors

Proceedings of the 18th annual international conference on Supercomputing
Dynamically Controlled Resource Allocation in SMT Processors

Proceedings of the 37th annual IEEE/ACM International Symposium on Microarchitecture
A Complexity-Effective Simultaneous Multithreading Architecture

ICPP '05 Proceedings of the 2005 International Conference on Parallel Processing
Learning-Based SMT Processor Resource Distribution via Hill-Climbing

Proceedings of the 33rd annual international symposium on Computer Architecture
Adaptive reorder buffers for SMT processors

Proceedings of the 15th international conference on Parallel architectures and compilation techniques
Partitioning Multi-Threaded Processors with a Large Number of Threads

ISPASS '05 Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2005
Static partitioning vs dynamic sharing of resources in simultaneous multithreading microarchitectures

APPT'05 Proceedings of the 6th international conference on Advanced Parallel Processing Technologies

Quantified Score

Hi-index	0.00

Visualization

Abstract

An important design issue of SMT processors is to find proper sharing strategies of resources among threads. This paper proposes a ROB sharing strategy, called paired ROB , that considers the fact that task parallelism is not always available to fully utilize resources of multithreaded processors. To this aim, an evaluation methodology is proposed and used for the experiments, which analyzes performance under different degrees of parallelism. Results show that paired ROBs are a cost-effective strategy that provides better performance than private ROBs for low task parallelism, whereas it incurs slight performance losses for high task parallelism.