Hardware/software co-design for high performance computing: challenges and opportunities
CODES/ISSS '10 Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Achieving exascale computing through hardware/software co-design
EuroMPI'11 Proceedings of the 18th European MPI Users' Group conference on Recent advances in the message passing interface
Poster: mini-applications: vehicles for co-design
Proceedings of the 2011 companion on High Performance Computing Networking, Storage and Analysis Companion
Concurrency and Computation: Practice & Experience
Energy-aware I/O optimization for checkpoint and restart on a NAND flash memory system
Proceedings of the 3rd Workshop on Fault-tolerance for HPC at extreme scale
Exascale design space exploration and co-design
Future Generation Computer Systems
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There is a large gap between the peak performance of supercomputers and the actual performance realized by todayâ聙聶s algorithms. This architectureâ聙聰algorithm performance gap will get even wider with the increase in computing power being driven by a rapid escalation in the number of cores incorporated into a single chip rather than increases in the clock rate. In order to improve the effectiveness of peta and exascale systems we need to have a paradigm shift where architectures and algorithms are co-designed.