SiGe analog AGC circuit for an 802.11a WLAN direct conversion receiver

  • Authors:

  • J. P. Alegre;S. Celma;B. Calvo;N. Fiebig;S. Halder

  • Affiliations:

  • Electronic Design Group (I3A), University of Zaragoza, Zaragoza, Spain;Electronic Design Group (I3A), University of Zaragoza, Zaragoza, Spain;Electronic Design Group (I3A), University of Zaragoza, Zaragoza, Spain;Circuit Design Department, lHP GmbH, Frankfurt, Germany;Circuit Design Department, lHP GmbH, Frankfurt, Germany

  • Venue:
  • IEEE Transactions on Circuits and Systems II: Express Briefs
  • Year:
  • 2009

Quantified Score

Hi-index 0.00

Visualization

Abstract

This brief presents a baseband automatic gain control (AGC) circuit for an IEEE 802.11a wireless local area network (WLAN) direct conversion receiver. The whole receiver is to be fully integrated in a low-cost 0.25-µm 75-GHz SiGe bipolar complementary metal-oxide-semiconductor (BiCMOS) process; thus, the AGC has been implemented in this technology by employing newly designed cells, such as a linear variable gain amplifier (VGA) and a fast-settling peak detector. Due to the stringent settling-time constraints of this system, a feedforward gain control architecture is proposed to achieve fast convergence. The proposed AGC is composed of two coarse-gain stages and a fine-gain stage, with a feedforward control loop for each stage. It converges with a gain error of below ±1 dB in less than 3.2 µs, whereas the power and area consumption are 13.75 mW and 0.225 mm2, respectively.