Probabilistic reasoning in intelligent systems: networks of plausible inference
Probabilistic reasoning in intelligent systems: networks of plausible inference
Stochastic Neural Computation I: Computational Elements
IEEE Transactions on Computers
Arithmetic Operators Robust to Multiple Simultaneous Upsets
DFT '04 Proceedings of the Defect and Fault Tolerance in VLSI Systems, 19th IEEE International Symposium
Energy Aware Computing through Probabilistic Switching: A Study of Limits
IEEE Transactions on Computers
A probabilistic-based design for nanoscale computation
Nano, quantum and molecular computing
Good error-correcting codes based on very sparse matrices
IEEE Transactions on Information Theory
Factor graphs and the sum-product algorithm
IEEE Transactions on Information Theory
Iterative decoding of compound codes by probability propagation in graphical models
IEEE Journal on Selected Areas in Communications
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A method is proposed for computing with unreliable nanoscale devices that have a high rate of transient errors. Errors are corrected using a probabilistic circuit in which device noise is leveraged as a computational asset. Example designs that achieve a low output bit error probability are presented. The effect of permanent defects is also evaluated, and transient device noise is found to be beneficial for correcting hard defects for defect rates of as high as 0.1% and transient fault rates above 1%. When compared with existing fault-tolerant methods, the sample design requires considerably fewer redundant gates to achieve reliable operation. These results predict that some degree of engineered randomness may prove to be a useful signal-processing feature in future nanoelectronic systems.