Computation of yield-optimized Pareto fronts for analog integrated circuit specifications
Proceedings of the Conference on Design, Automation and Test in Europe
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Expert Systems with Applications: An International Journal
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This work focuses on the generation of the Pareto front for practical applications such as analog circuit sizing. The Pareto front is the solution to a multiobjective optimization problem. It shows all possible optimal compromises between conflicting design objectives (performances). In technical applications, the Pareto front is usually bounded. It is shown in this work that the boundary of the Pareto front consists of so-called trade-off limits if certain criteria are fulfilled. These trade-off limits can be computed by solving a multiobjective optimization problem for a subset of the performances. A novel approach to Pareto optimization is presented, which is based on the generation of the trade-off limits. The Pareto front for any number of performances is built up systematically in a successive manner. Pareto-optimal solutions on the boundary of a Pareto front are generated first. In the next step, the inner part of the Pareto front is populated with Pareto-optimal solutions. This is the first approach, which generates a discretized approximation that shows the total extent of a bounded Pareto front without requiring to calculate suboptimal solutions. It requires that the Pareto front exists, is bounded and connected with no gaps, and that the set of weakly Pareto-optimal solutions and Pareto-optimal solutions are equal.