A low-voltage micropower digital class-D amplifier modulator for hearing aids

  • Authors:
  • Victor Adrian;Joseph S. Chang;Bah-wee Gwee

  • Affiliations:
  • School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore, Singapore;School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore, Singapore;School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore, Singapore

  • Venue:
  • IEEE Transactions on Circuits and Systems Part I: Regular Papers
  • Year:
  • 2009

Quantified Score

Hi-index 0.00

Visualization

Abstract

We present a micropower digital modulator for class-D amplifiers for power-critical digital hearing aids. The modulator design embodies a proposed Lagrange interpolation (a combined first- and second-order Lagrange) algorithmic pulsewidth modulation (PWM) and a third-order ΔΣ noise shaper. By means of double-Fourier-series analysis, we analyze and determine the harmonic nonlinearities of the proposed algorithmic PWM. At 48-kHz sampling, 96-kHz PWM output, 997-Hz input, and input modulation index = 0.9, the modulator circuit achieves a total harmonic distortion + noise (THD + N) of -74 dB (0.02%) over an 8-kHz voice bandwidth--a 12-dB THD + N improvement over a reported design and yet dissipates only ∼50% of the power. The proposed modulator dissipates the lowest power dissipation of all modulators compared, and by means of a proposed figure of merit, the proposed modulator exhibits very competitive performance. The modulator IC is fabricated in a 0.35-µm digital CMOS process with a core area of 0.46 mm2.