Multicore software-defined radio architecture for GNSS receiver signal processing

Authors:
Heikki Hurskainen;Jussi Raasakka;Tapani Ahonen;Jari Nurmi
Affiliations:
Department of Computer Systems, Tampere University of Technology, Tampere, Finland;Department of Computer Systems, Tampere University of Technology, Tampere, Finland;Department of Computer Systems, Tampere University of Technology, Tampere, Finland;Department of Computer Systems, Tampere University of Technology, Tampere, Finland
Venue:
EURASIP Journal on Embedded Systems - Special issue on design and architectures for signal and image processing
Year:
2009

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Abstract

We describe a multicore Software-Defined Radio (SDR) architecture for Global Navigation Satellite System (GNSS) receiver implementation. A GNSS receiver picks up very low power signals from multiple satellites and then uses dedicated processing to demodulate and measure the exact timing of these signals from which the user's position, velocity, and time (PVT) can be estimated. Three GNSS SDR architectures are discussed. (1) A hardware-based SDR that is feasible for embedded devices but relatively expensive, (2) a pure SDR approach that has high level of flexibility and low bill of material, but is not yet suited for handheld applications, and (3) a novel architecture that uses a programmable array of multiple processing cores that exhibits both flexibility and potential for mobile devices. We present the CRISP project where the multicore architecture will be realized along with numerical analysis of application requirements of the platform's processing cores and network payload.