1.672 Gigabits/s FPGA based Viterbi decoder for 4D 8PSK TCM

Authors:
A.T.M. Anishur Rahman;W. G. Cowley
Affiliations:
Institute for Telecommunications Research, University of South Australia, Adelaide, Australia;Institute for Telecommunications Research, University of South Australia, Adelaide, Australia
Venue:
Digital Signal Processing
Year:
2010

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Abstract

In this paper a novel Viterbi decoder architecture for 4D 8PSK TCM scheme is presented and analyzed. The design includes a new three RAM based traceback unit. With some modification this architecture can be used for different spectral efficiencies of 4D 8PSK TCM schemes as available in the Consultative Committee for the Space Data Systems (CCSDS) standard for the Earth Exploration Satellites (EES). The current design supports data rates up to 1672 MBit/s. Required hardware resources are shown, plus simulation results and measurement from the real-time decoder are discussed.