An Efficient Method for Evaluating Complex Polynomials

  • Authors:

  • Miloš D. Ercegovac;Jean-Michel Muller

  • Affiliations:

  • Computer Science Department, University of California at Los Angeles, Los Angeles, USA 90095;CNRS-Laboratoire LIP, projet Arénaire, Inria, Université de Lyon, Ecole Normale Supérieure de Lyon, Lyon Cedex 07, France 69364

  • Venue:
  • Journal of Signal Processing Systems
  • Year:
  • 2010

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Abstract

We propose an efficient hardware-oriented method for evaluating complex polynomials. The method is based on solving iteratively a system of linear equations. The solutions are obtained digit-by-digit on simple and highly regular hardware. The operations performed are defined over the reals. We describe a complex-to-real transform, a complex polynomial evaluation algorithm, the convergence conditions, and a corresponding design and implementation. The latency and the area are estimated for the radix-2 case. The main features of the method are: the latency of about m cycles for an m-bit precision; the cycle time independent of the precision; a design consisting of identical modules; and digit-serial connections between the modules. The number of modules, each roughly corresponding to serial-parallel multiplier without a carry-propagate adder, is 2(n驴+驴1) for evaluating an n-th degree complex polynomial. The method can also be used to compute all successive integer powers of the complex argument with the same latency and a similar implementation cost. The design allows straightforward tradeoffs between latency and cost: a factor k decrease in cost leads to a factor k increase in latency. A similar tradeoff between precision, latency and cost exists. The proposed method is attractive for programmable platforms because of its regular and repetitive structure of simple hardware operators.