Esterel: a formal method applied to avionic software development
Science of Computer Programming
Translation validation for an optimizing compiler
PLDI '00 Proceedings of the ACM SIGPLAN 2000 conference on Programming language design and implementation
Information and Computation
TACAS '98 Proceedings of the 4th International Conference on Tools and Algorithms for Construction and Analysis of Systems
From simulink to SCADE/lustre to TTA: a layered approach for distributed embedded applications
Proceedings of the 2003 ACM SIGPLAN conference on Language, compiler, and tool for embedded systems
Interactive Theorem Proving and Program Development
Interactive Theorem Proving and Program Development
Type-based initialization analysis of a synchronous dataflow language
International Journal on Software Tools for Technology Transfer (STTT) - Special section on tool integration applications and frameworks
Formal certification of a compiler back-end or: programming a compiler with a proof assistant
Conference record of the 33rd ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Mixing signals and modes in synchronous data-flow systems
EMSOFT '06 Proceedings of the 6th ACM & IEEE International conference on Embedded software
Clock-directed modular code generation for synchronous data-flow languages
Proceedings of the 2008 ACM SIGPLAN-SIGBED conference on Languages, compilers, and tools for embedded systems
Certified development tools implementation in objective Caml
PADL'08 Proceedings of the 10th international conference on Practical aspects of declarative languages
Development of a synchronous subset of AADL
ABZ'10 Proceedings of the Second international conference on Abstract State Machines, Alloy, B and Z
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This paper presents the development of a correct-by-construction block sequencer for GeneAuto a qualifiable (according to DO178B/ED12B recommendation) automatic code generator. It transforms Simulink models to MISRA C code for safety critical systems. Our approach which combines classical development process and formal specification and verification using proof-assistants, led to preliminary fruitful exchanges with certification authorities. We present parts of the classical user and tools requirements and derived formal specifications, implementation and verification for the correctness and termination of the block sequencer. This sequencer has been successfully applied to real-size industrial use cases from various transportation domain partners and led to requirement errors detection and a correct-by-construction implementation.