Validating Component Integration with C-TILCO

  • Authors:

  • P. Bellini;P. Nesi;D. Rogai

  • Affiliations:

  • Dipartimento di Sistemi e Informatica, Università degli Studi di Firenze, Firenze, Italy, Via S. Marta 3, 50139 Firenze, Italy, tel.: +39-055-4796523, fax.:+39-055-4796363;Dipartimento di Sistemi e Informatica, Università degli Studi di Firenze, Firenze, Italy, Via S. Marta 3, 50139 Firenze, Italy, tel.: +39-055-4796523, fax.:+39-055-4796363;Dipartimento di Sistemi e Informatica, Università degli Studi di Firenze, Firenze, Italy, Via S. Marta 3, 50139 Firenze, Italy, tel.: +39-055-4796523, fax.:+39-055-4796363

  • Venue:
  • Electronic Notes in Theoretical Computer Science (ENTCS)
  • Year:
  • 2005

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Abstract

Temporal logics are typically used to specify and verify properties and thus requirements, to describe the system and to prove whether such formalization meets the expected behavior. In this paper, C-TILCO temporal logic is considered. C-TILCO is an extension of TILCO temporal logic which provides compositional and communication primitives. TILCO specifications of system behavior can be directly used as implementations since they can be directly executed in real-time by using the TILCO executor. The validation phase can be applied to both the single components and their integration in order to validate the entire solution. In this article, a case study about specification of a communicating system is presented together with some important property proofs taken from the validation phase.