Verification of Scenario-based Specifications using Templates

  • Authors:
  • Girish Keshav Palshikar;Purandar Bhaduri

  • Affiliations:
  • Tata Research Development and Design Centre (TRDDC), 54B, Hadapsar Industrial Estate, Pune 411013, India;Tata Research Development and Design Centre (TRDDC), 54B, Hadapsar Industrial Estate, Pune 411013, India

  • Venue:
  • Electronic Notes in Theoretical Computer Science (ENTCS)
  • Year:
  • 2005

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Abstract

Specifying dynamic behaviour of a system by listing scenarios of its interactions has become a popular practice. Message sequence chart (MSC) is a rigorous and widely used notation for specifying such scenarios of system behaviour. High-level MSCs (HMSC) provide hierarchical and modular composition facilities for constructing complex scenarios from basic MSCs. Although the general problem of formal verification of properties of HMSCs is intractable, we propose a framework for restricted verification. We present simple templates for commonly used types of properties and discuss efficient algorithms for verifying them.