Specification and verification of concurrent programs by A∀automata
POPL '87 Proceedings of the 14th ACM SIGACT-SIGPLAN symposium on Principles of programming languages
Programming and verifying critical systems by means of the synchronous data-flow language LUSTRE
SIGSOFT '91 Proceedings of the conference on Software for citical systems
Model checking and abstraction
ACM Transactions on Programming Languages and Systems (TOPLAS)
Automatic discovery of linear restraints among variables of a program
POPL '78 Proceedings of the 5th ACM SIGACT-SIGPLAN symposium on Principles of programming languages
POPL '77 Proceedings of the 4th ACM SIGACT-SIGPLAN symposium on Principles of programming languages
Recognizing Regular Expressions by Means of Dataflow Networks
ICALP '96 Proceedings of the 23rd International Colloquium on Automata, Languages and Programming
Synthesizing Monitors for Safety Properties
TACAS '02 Proceedings of the 8th International Conference on Tools and Algorithms for the Construction and Analysis of Systems
A Tool for Symbolic Program Verification and Abstration
CAV '93 Proceedings of the 5th International Conference on Computer Aided Verification
An Automata-Theoretic Approach to Branching-Time Model Checking (Extended Abstract)
CAV '94 Proceedings of the 6th International Conference on Computer Aided Verification
Symbolic Verification with Periodic Sets
CAV '94 Proceedings of the 6th International Conference on Computer Aided Verification
Multiple Counters Automata, Safety Analysis and Presburger Arithmetic
CAV '98 Proceedings of the 10th International Conference on Computer Aided Verification
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The goal of this paper is to translate (fragments of) the quantified discrete duration calculus QDDC, proposed by P. Pandya, into symbolic acceptors with counters. Acceptors are written in the synchronous programming language Lustre, in order to allow available symbolic verification tools (model-checkers, abstract interpreters) to be applied to properties expressed in QDDC. We show that important constructs of QDDC need non-deterministic acceptors, in order to be translated with a bounded number of counters, and an expressive fragment of the logic is identified and translated. Then, we consider a more restricted fragment, which only needs deterministic acceptors.