A technique to improve the linearization of frequency---voltage characteristic of LC-VCO

  • Authors:

  • Debashis Mandal;T. K. Bhattacharyya

  • Affiliations:

  • Department of Electronics and Electrical Communication Engineering, Indian Institute of Technology, Kharagpur, Kharagpur, India 721302;Department of Electronics and Electrical Communication Engineering, Indian Institute of Technology, Kharagpur, Kharagpur, India 721302

  • Venue:
  • Analog Integrated Circuits and Signal Processing
  • Year:
  • 2010

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Abstract

This paper presents a very low-power linearization technique to improve the linearity of frequency-voltage characteristic of LC-VCO (voltage controlled oscillator) using MOS varactor. This reduces the VCO gain (K VCO) variation and its required value over the tuning voltage range. Low K VCO improves noise and reference spur performances at the output of phase lock loop/frequency synthesizer (FS). Low K VCO variation reduces FS loop stability problem. Using this VCO circuit, a fully on-chip integer-N frequency synthesizer has been fabricated in 0.18 μm epi-digital CMOS technology for 2.45 GHz ZigBee application. The measured VCO phase noise is 驴115.76 and 驴125.23 dBc/Hz at 1 and 3 MHz offset frequencies, respectively from 2.445 GHz carrier and the reference spur of the frequency synthesizer is 驴68.62 dBc. The used supply voltage is 1.5 V.