TLSS: a powerful software tool for structural synthesis of transliniar integrated circuits

  • Authors:
  • Elena Doicaru;Ileana Nicolae;Claudius Dan;Dan-Ovidiu Andrei

  • Affiliations:
  • University of Craiova, Decebal, Craiova;University of Craiova, Decebal, Craiova;Politehnica University of Bucharest, Bucharest, Romania;University of Craiova, Decebal, Craiova

  • Venue:
  • SPPRA '08 Proceedings of the Fifth IASTED International Conference on Signal Processing, Pattern Recognition and Applications
  • Year:
  • 2008

Quantified Score

Hi-index 0.00

Visualization

Abstract

This paper presents a software tool developed in C++ code using Visual C++ 2005 programming environment and used for the structural synthesis of translinear integrated circuits in order to implement prescribed linear and nonlinear functions. For a given function the program yields a set of realizations, with BJT or MOSFET, which are automatically compared by SPICE simulation, considering the criteria: stability, bandwidth and magnitude of circuit - induced errors. Another user option refers to the comparison of the generated alternative network configurations obtained for a given function from the point of view of sensitivities to parameter tolerances in order to choose the best one.