Hardware architecture for pattern recognition in gamma-ray experiment

  • Authors:
  • Sonia Khatchadourian;Jean-Christophe Prévotet;Lounis Kessal

  • Affiliations:
  • ETIS, CNRS, UMR, ENSEA, University of Cergy-Pontoise, Cergy-Pontoise, France;ETIS, CNRS, UMR, ENSEA, University of Cergy-Pontoise, Cergy-Pontoise, France;IETR, CNRS, UMR, INSA de Rennes, Rennes, France

  • Venue:
  • EURASIP Journal on Embedded Systems - Special issue on design and architectures for signal and image processing
  • Year:
  • 2009

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Abstract

The HESS project has been running successfully for seven years. In order to take into account the sensitivity increase of the entire project in its second phase, a new trigger scheme is proposed. This trigger is based on a neural system that extracts the interesting features of the incoming images and rejects the background more efficiently than classical solutions. In this article, we present the basic principles of the algorithms as well as their hardware implementation in FPGAs (Field Programmable Gate Arrays).