Analysis of the parallel packet switch architecture
IEEE/ACM Transactions on Networking (TON)
Design and Implementation of Switches in Network Simulator (ns2)
ICICIC '06 Proceedings of the First International Conference on Innovative Computing, Information and Control - Volume 1
High Performance Switches and Routers
High Performance Switches and Routers
Load balanced Birkhoff-von Neumann switches, part I: one-stage buffering
Computer Communications
Extensible hierarchical simulation of network systems
Proceedings of the eighth ACM/IEEE symposium on Architectures for networking and communications systems
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Parallel packet switch (PPS) is used intensively in today's high-performance routers. But the lack of a simple simulation method negatively affects the evolution of PPS. In this paper, we propose a novel and practical way to evaluate the performance of PPS based on NS2, through which PPS can be a module extension for NS2 library by deriving from base classes and modifying the procedure of packet forwarding in NS2. We take an improved PPS structure which can support differentiated quality of service (QoS) as an example to show that: by this method, coding in relevant functions can achieve particular PPS which is provided with characteristics for research requirements. Simulation results and theoretical analysis show the implementation capacity.