Operational amplifiers with flexible noise power balance scheme for SOC application

  • Authors:
  • B. K. Mishra;S. Save

  • Affiliations:
  • Thakur college of Engg. & Tech., Kandivali (E), Mumbai;Thakur college of Engg. & Tech., Kandivali (E), Mumbai

  • Venue:
  • Proceedings of the International Conference and Workshop on Emerging Trends in Technology
  • Year:
  • 2010

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Abstract

Advances in integrated circuit technology have led to the birth and proliferation of a wide variety of integrated circuits, including but not limited to application specific integrated circuits(ASIC), various types of microcontrollers and processors. Many applications such as communication devices (VoIP, MoIP, wireless) require chip speeds that may be unattainable with separate IC products. Creating portable analog modules requires the system to capture not only the sized schematic of the circuit but also the objectives that circuit is trying to achieved. This paper applies the embedding knowledge into pure simulation based methodology to perform automatic analog intergraded circuit design, synthesis and optimization in order to reduce development time of this kind of circuits. A practical platform independent computer aided design methodology for synthesis of (analog circuits) Operational Amplifier with flexible noise --power balance is presented in this paper. In order to evaluate the fitness of the circuit specifications in any iteration of SA, NGSPICE simulation is used. The simulation results confirm the efficiency of presented methodology in determining the device sizes in analog circuits.