Serial combinators: “optimal” grains of parallelism
Proc. of a conference on Functional programming languages and computer architecture
Transputer-based experiments with the ZAPP architecture
Volume I: Parallel architectures on PARLE: Parallel Architectures and Languages Europe
Control of parallelism in the Manchester Dataflow Machine
Proc. of a conference on Functional programming languages and computer architecture
Parallel graph reduction with the (v , G)-machine
FPCA '89 Proceedings of the fourth international conference on Functional programming languages and computer architecture
An introduction to functional programming
An introduction to functional programming
Functional Programming for Loosely-Coupled Multiprocessors
Functional Programming for Loosely-Coupled Multiprocessors
Distributed Implementation of Programmed Graph Reduction
PARLE '89 Proceedings of the Parallel Architectures and Languages Europe, Volume I: Parallel Architectures
Some Ideas On Parallel Functional Programming
Proceedings of the 1989 Glasgow Workshop on Functional Programming
Executing functional programs on a virtual tree of processors
FPCA '81 Proceedings of the 1981 conference on Functional programming languages and computer architecture
Automatic partitioning and scheduling on a network of personal computers
Automatic partitioning and scheduling on a network of personal computers
Algorithmic skeletons: a structured approach to the management of parallel computation
Algorithmic skeletons: a structured approach to the management of parallel computation
Multiprocessor execution of functional programs
Multiprocessor execution of functional programs
The Implementation of Functional Programming Languages (Prentice-Hall International Series in Computer Science)
Divide-and-Conquer for Parallel Processing
IEEE Transactions on Computers
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This paper is concerned with the design of a multiprocessor system supporting the parallel execution of functional programs. Parallelism in such systems is automatically derived by the compiler but this parallelism is unlikely to meet the physical constraints of the target machine. In this paper, these problems are identified for the class of Divide-and-Conquer algorithms and a solution which consists of reducing the depth of the computational tree is proposed. A parallel graph reduction machine simulated on a network of transputers, developed for testing the proposed solutions, is described. Experiments have been conducted on some simple Divide-and-Conquer programs and the results are presented. Lastly, some proposals are made for an automatic system that would efficiently execute any problem belonging to the same class taking into account the nature of the problem as well as the physical characteristics of the implementation.