The design and optimization methodology of a low-distortion sub-µW sample-and-hold stage for weak bio-currents

Authors:
Jie Yuan;Ka Leong Tsang
Affiliations:
Electronic and Computer Engineering Department, Hong Kong University of Science and Technology, Clearwater Bay, Kowloon, Hong Kong;Electronic and Computer Engineering Department, Hong Kong University of Science and Technology, Clearwater Bay, Kowloon, Hong Kong
Venue:
Microelectronics Journal
Year:
2010

Citing 3
Cited 0

Analysis and Design of Analog Integrated Circuits

Analysis and Design of Analog Integrated Circuits
Modeling, quantitative analysis, and design of switched-current pipeline A/D converters

IEEE Transactions on Circuits and Systems Part I: Regular Papers
Operation of analog MOS circuits in the weak or moderate inversion region

IEEE Transactions on Education

Quantified Score

Hi-index	0.00

Visualization

Abstract

Current sample-and-hold (SHI) stage is important for reducing the signal distortion of bio-medical current detectors. Previous SHIs achieve high linearity only with high power consumption. This paper introduces a low-distortion switched-current (SI) sample-and-hold stage for high-performance current sampling of weak currents, by applying constant charge injection on a weakly inverted MOS transistor. The paper also introduces a methodology to design and optimize the SHI for a target signal-to-noise-distortion ratio (SNDR). A sample SHI is designed according to the methodology in a 0.35@mm CMOS process. Silicon measurements verify that the fabricated SHI meets the design targets, and can achieve above 58dB SNDR and above 68dB spurious-free dynamic range (SFDR) at the sampling rate of 2kS/s for a 100nA input current up to 1kHz. The power consumption of the SHI is only 0.7@mW.