On proving circuit lower bounds against the polynomial-time hierarchy: positive and negative results

Authors:
Jin-Yi Cai;Osamu Watanabe
Affiliations:
Computer Sci. Dept., Univ. of Wisconsin, Madison, WI;Dept. of Math. and Comp. Sci., Tokyo Inst. of Technology
Venue:
COCOON'03 Proceedings of the 9th annual international conference on Computing and combinatorics
Year:
2003

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Abstract

We consider the problem of proving circuit lower bounds against the polynomial-time hierarchy. We give both positive and negative results. For the positive side, for any fixed integer k 0, we give an explicit Σ2p language, acceptable by a Σ2p-machine with running time O(nk2+k), that requires circuit size nk. For the negative side, we propose a new stringent notion of relativization, and prove under this stringent relativization that every language in the polynomial-time hierarchy has polynomial circuit size. (For technical details, see also [CW03].)