On Limits and Possibilities of Automated Protocol Analysis
Proceedings of the IFIP WG6.1 Seventh International Conference on Protocol Specification, Testing and Verification VII
Coverage Preserving Reduction Strategies for Reachability Analysis
Proceedings of the IFIP TC6/WG6.1 Twelth International Symposium on Protocol Specification, Testing and Verification XII
Improved probabilistic verification by hash compaction
CHARME '95 Proceedings of the IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods
CAV '92 Proceedings of the Fourth International Workshop on Computer Aided Verification
Reliable Hashing without Collosion Detection
CAV '93 Proceedings of the 5th International Conference on Computer Aided Verification
Introduction to Algorithms, Third Edition
Introduction to Algorithms, Third Edition
The ComBack method: extending hash compaction with backtracking
ICATPN'07 Proceedings of the 28th international conference on Applications and theory of Petri nets and other models of concurrency
Parallel recursive state compression for free
Proceedings of the 18th international SPIN conference on Model checking software
Memory efficient state space storage in explicit software model checking
SPIN'05 Proceedings of the 12th international conference on Model Checking Software
MEMICS'11 Proceedings of the 7th international conference on Mathematical and Engineering Methods in Computer Science
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A novel, very memory-efficient hash table structure for representing a set of bit vectors -- such as the set of reachable states of a system -- is presented. Let the length of the bit vectors be w. There is an information-theoretic lower bound on the average memory consumption of any data structure that is capable of representing a set of at most n such bit vectors. We prove that, except in extreme cases, this bound is within 10% of nw-n log2 n+n. In many cases this is much smaller than what typical implementations of hash tables, binary trees, etc., require, because they already use nw bits for representing just the payload. We give both theoretical and experimental evidence that our data structure can attain an estimated performance of 1.07nw - 1.05n log2 n + 6.12n, which is close to the lower bound and much better than nw for many useful values of n and w. We show how the data structure can be extended to mappings while retaining its good performance. Furthermore, our data structure is not unduly slow.