Double-size bipartite modular multiplication

  • Authors:
  • Masayuki Yoshino;Katsuyuki Okeya;Camille Vuillaume

  • Affiliations:
  • Hitachi, Ltd., Systems Development Laboratory, Kawasaki, Japan;Hitachi, Ltd., Systems Development Laboratory, Kawasaki, Japan;Hitachi, Ltd., Systems Development Laboratory, Kawasaki, Japan

  • Venue:
  • ACISP'07 Proceedings of the 12th Australasian conference on Information security and privacy
  • Year:
  • 2007

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Abstract

This paper proposes new techniques of double-size bipartite multiplications with single-size bipartite modular multiplication units. Smartcards are usually equipped with crypto-coprocessors for accelerating the computation of modular multiplications, however, their operand size is limited. Security institutes such as NIST and standards such as EMV have recommended or forced to increase the bit-length of RSA cryptography over years. Therefore, techniques to compute double-size modular multiplications with single-size modular multiplication units has been studied this decade to extend the life expectancy of the low-end devices. We propose new double-size techniques based on multipliers implementing either classical or Montgomery modular multiplications, or even both simultaneously (bipartite modular multiplication), in which case one can potentially compute modular multiplications twice faster.