Communications of the ACM
Parallel depth first search. Part II. analysis
International Journal of Parallel Programming
Scalability of parallel machines
Communications of the ACM
Journal of Parallel and Distributed Computing - Special issue on scalability of parallel algorithms and architectures
Evaluating the Scalability of Distributed Systems
IEEE Transactions on Parallel and Distributed Systems
An efficient architecture model for systematic design of application-specific multiprocessor SoC
Proceedings of the conference on Design, automation and test in Europe
An optimal memory allocation for application-specific multiprocessor system-on-chip
Proceedings of the 14th international symposium on Systems synthesis
High Performance Cluster Computing: Architectures and Systems
High Performance Cluster Computing: Architectures and Systems
Performance Metrics: Keeping the Focus on Runtime
IEEE Parallel & Distributed Technology: Systems & Technology
Scalability of Parallel Algorithm-Machine Combinations
IEEE Transactions on Parallel and Distributed Systems
Definition of a Robustness Metric for Resource Allocation
IPDPS '03 Proceedings of the 17th International Symposium on Parallel and Distributed Processing
Computer Architecture: A Quantitative Approach
Computer Architecture: A Quantitative Approach
The Design Warrior's Guide to FPGAs
The Design Warrior's Guide to FPGAs
RSP '04 Proceedings of the 15th IEEE International Workshop on Rapid System Prototyping
The Robustness of Resource Allocation in Parallel and Distributed Computing Systems
ISPDC '04 Proceedings of the Third International Symposium on Parallel and Distributed Computing/Third International Workshop on Algorithms, Models and Tools for Parallel Computing on Heterogeneous Networks
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New high performance architectures combining high and low level design techniques are widely used today, and FPGA platforms offer excellent solutions for this kind of system. There are a lot of multiprocessor systems implemented on FPGAs but the performance metrics usually considered with the traditional multiprocessors have not been adapted for systems on chip yet. For these high performance systems the classic hardware metrics, such as area, cost and minimum period, are still used; but sometimes they do not provide enough information to guide users and designers in their decisions. In this paper, new definitions for high level performance metrics such as efficiency, scalability and robustness are proposed to overcome these limitations with FPGA-based multiprocessor systems.