Empirical study for optimization of power-performance with on-chip memory

  • Authors:

  • Chikafumi Takahashi;Mitsuhisa Sato;Daisuke Takahashi;Taisuke Boku;Hiroshi Nakamura;Masaaki Kondo;Motonobu Fujita

  • Affiliations:

  • Center for Computational Sciences, University of Tsukuba;Center for Computational Sciences, University of Tsukuba;Center for Computational Sciences, University of Tsukuba;Center for Computational Sciences, University of Tsukuba;Research Center for Advanced Science and Technology, The University of Tokyo;Research Center for Advanced Science and Technology, The University of Tokyo;Research Center for Advanced Science and Technology, The University of Tokyo

  • Venue:
  • ISHPC'05/ALPS'06 Proceedings of the 6th international symposium on high-performance computing and 1st international conference on Advanced low power systems
  • Year:
  • 2005

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Abstract

Power-performance (performance per uniform power consumption) recently has become a more important factor in modern highperformance microprocessors. In processor design, it is a well-known that off-chip memory access has a large impact on both performance and power consumption. On-chip memory is one solution for this problem, so that many processors such as the Renesas SH-4 and some ARM architecture type processors adopt on-chip memory, which resides on the same layer as the cache memory. In this study, the effectiveness of the on-chip memory in an SH-4 processor was quantitatively examined by directly measuring the real power of the processor. For these experiments, we proposed a method that made use of the on-chip memory for power reduction. The experimental results show that the optimization of data transfer using on-chip memory reduces EDP(energy delay product) by up to 15.2%. As an extension of on-chip memory, we have proposed an on-chip RAM architecture called SCIMA (software controllable integrated memory architecture) which enables DMA (direct memory access) transfer to the on-chip memory. According to the empirical data from the SH-4 processor, it was found that the additional DMA transfer using SCIMA reduces EDP by up to 26.3%.