A public key cryptosystem and a signature scheme based on discrete logarithms
Proceedings of CRYPTO 84 on Advances in cryptology
Efficient Arithmetic on Koblitz Curves
Designs, Codes and Cryptography - Special issue on towards a quarter-century of public key cryptography
CM-Curves with Good Cryptographic Properties
CRYPTO '91 Proceedings of the 11th Annual International Cryptology Conference on Advances in Cryptology
Efficient Multiplication on Certain Nonsupersingular Elliptic Curves
CRYPTO '92 Proceedings of the 12th Annual International Cryptology Conference on Advances in Cryptology
An Improved Algorithm for Arithmetic on a Family of Elliptic Curves
CRYPTO '97 Proceedings of the 17th Annual International Cryptology Conference on Advances in Cryptology
High Performance FPGA based Elliptic Curve Cryptographic Co-Processor
ITCC '04 Proceedings of the International Conference on Information Technology: Coding and Computing (ITCC'04) Volume 2 - Volume 2
FPGA implementation of point multiplication on koblitz curves using kleinian integers
CHES'06 Proceedings of the 8th international conference on Cryptographic Hardware and Embedded Systems
Finite Fields and Their Applications
Fast point multiplication on Koblitz curves: Parallelization method and implementations
Microprocessors & Microsystems
On the distribution of the coefficients of normal forms for Frobenius expansions
Designs, Codes and Cryptography
| Hi-index | 0.00 |
Scalar multiplication on Koblitz curves can be very efficient due to the elimination of point doublings. Modular reduction of scalars is commonly performed to reduce the length of expansions, and τ-adic Non-Adjacent Form (NAF) can be used to reduce the density. However, such modular reduction can be costly. An alternative to this approach is to use a random τ -adic NAF, but some cryptosystems (e.g. ECDSA) require both the integer and the scalar multiple. This paper presents an efficient method for computing integer equivalents of random τ-adic expansions. The hardware implications are explored, and an efficient hardware implementation is presented. The results suggest significant computational efficiency gains over previously documented methods.