Inter-processor communication optimization in dynamically reconfigurable embedded parallel systems

Authors:
Eryk Laskowski;Marek Tudruj
Affiliations:
Institute of Computer Science PAS, Warsaw, Poland;Institute of Computer Science PAS, Warsaw, Poland and Polish-Japanese Institute of Information Technology, Warsaw, Poland
Venue:
PPAM'07 Proceedings of the 7th international conference on Parallel processing and applied mathematics
Year:
2007

Citing 6
Cited 0

Scheduling precedence graphs in systems with interprocessor communication times

SIAM Journal on Computing
Low Latency Communication on DIMMnet-1 Network Interface Plugged into a DIMM Slot

PARELEC '02 Proceedings of the International Conference on Parallel Computing in Electrical Engineering
New Program Structuring Heuristics for Multi-Processor Systems with Redundant Communication Resources

PARELEC '02 Proceedings of the International Conference on Parallel Computing in Electrical Engineering
User Level Communication on Alpha Linux Systems

ISPAN '00 Proceedings of the 2000 International Symposium on Parallel Architectures, Algorithms and Networks
Program Scheduling in Look-Ahead Reconfigurable Parallel Systems with Multiple Communication Resources

PARELEC '04 Proceedings of the international conference on Parallel Computing in Electrical Engineering
Efficient Parallel Embedded Computing through Look-Ahead Configured Dynamic Inter-Processor Connections

PARELEC '06 Proceedings of the international symposium on Parallel Computing in Electrical Engineering

Quantified Score

Hi-index	0.00

Visualization

Abstract

The paper concerns program design methods for a new kind of parallel embedded systems in which communication infrastructure is dynamically run-time adaptable to particular application program needs. The new system architecture assumes a fairly large number of autonomous communication links in each executive processor. Interprocessor link connections are subdue to dynamic reconfiguration according to the compile-time elaborated strategy based on the application program graph analysis. Automatic program structuring methods are used for defining the structuring of reconfigurable processor link sets which enables the look-ahead connection reconfiguration that overlaps with the current program execution including data communication. Algorithms for respective program task scheduling and dynamic program decomposition into sections executed with the look-ahead created connections of subsets of processor links are presented. Simulation experiment results with structuring of parallel numerical programs of matrix multiplication are presented. The experiments compare program structuring quality of the look ahead connection reconfiguration based on multiple crossbar switches with the quality of reconfiguration in a single crossbar switch but with the use of multiple link subsets reconfigured in advance.